Integrated circuits are fabricated on the surface of a semiconductor wafer in layers and later singulated into individual dies. Since the material of a semiconductor wafer—commonly silicon—tends to be relatively fragile and brittle, dies are often assembled into a protective housing, or package, before they are interconnected with a printed circuit board (PCB). Referring now to FIG. 1, a cross-sectional view is shown of a packaged semiconductor device 100. A semiconductor die 110 is shown attached to a package substrate 120, a structure comprising alternating layers of conductive material 122 and insulating material 124. The die 110 is electrically interconnected to the package substrate 120 by a plurality of bond wires 130. The top surface 126 and bottom surface 128 of the package substrate 120 may be covered with a photo-definable solder mask material 132, in which openings can be created, exposing a portion of the metal 122 below.
The die 110 and bond wires 130 may be encapsulated by a solid mold compound 140 (e.g., an epoxy), protecting the bond wires from physical damage and/or environmental effects. Solder balls 150, spheres of conductive material (e.g., tin-lead), may be attached to solder ball pads 170. Solder ball pads 170 are typically circular areas of conductive material 122 exposed by openings in the solder mask layer 132 on the bottom surface 128 of the substrate 120. When mounted to a PCB 180, the conductive material 122 forms a pathway of electrical communication between the die 110 and the PCB, as well as to the electrical device (not shown) in which the PCB is eventually installed. The package substrate 120 and PCB 180 may both be laminate electronic circuit boards with similar constructions, which will be discussed in more detail herein.
Referring now to FIG. 2A, a cross-sectional view of a solder joint 200 is shown, in which a solder ball 150 is mounted between a standard solder-mask-defined (SMD) solder ball pad 170 and a PCB 180. The standard SMD pad 170 is so named because the pad 170 is “defined” by the solder mask 132, such that only the central portion of the pad is exposed for attachment to a solder ball 150. FIG. 2B shows a perspective view of the standard SMD pad 170. The opening 210 in the solder mask 132 defines the pad area exposed for attachment to a solder ball (not shown in FIG. 2B). The insulating material 124 used in a package substrate 120 may be bismaleimide triazine (BT), with a center insulating layer, or core, of BT or another organic material, such as glass-fiber-reinforced epoxy (FR4). The conductive material 122 may be copper, which may tend to delaminate, or peel away, from the BT when subjected to temperature cycling used in semiconductor package reliability testing. Adhesion between the insulating material 124 and the solder mask 132, another non-metal, may be greater than adhesion between an organic insulating material and a metal pad 170. As such, the overhanging lip 212 of solder mask 132 covering the outer edge 172 of pad 170 may serve to hold the pad onto the insulating material 124, lessening the chance for delamination.
As the solder ball 150 does not adhere to the solder mask 132, when the solder ball is attached, a neck 230 of reduced diameter may form in the solder ball near the interface between the solder ball and pad 170. This interface may have the highest stress concentrations within the solder joint under temperature cycling, bending, vibration or drop-impact conditions. Packaged semiconductor devices often undergo board-level reliability (BLR) testing, reliability stress tests that may subject a PCB-mounted packaged semiconductor device to temperature cycling, elevated humidity and/or pressure. This analysis may give an indication on how the packaged semiconductor device will perform in the field once the package is assembled into an electronic device.
Solder joint reliability is a significant area of concern with ball grid array (BGA) packages, such as that shown in FIG. 1. BGA packages are so named due to the array of pads for mounting solder balls to on the bottom surface of the substrate. A PCB 180 and a package substrate 120 may have considerably different coefficients of thermal expansion (CTE), a value associated with the amount a material expands per degree of temperature increase. As the packaged semiconductor device 100 may collectively expand at a different rate than the PCB 180 to which it is attached, significant material stresses may occur within the solder balls 150 attaching the two. As structures tend to fail at areas of reduced diameter or along simple, planar interfaces, the neck area 230 of solder ball 150 is particularly susceptible to cracking under material stresses. Temperature cycling is a common BLR test, in which a PCB-mounted package is cycled through temperature extremes, with periods of sustained exposure (or soaks) to either of the extremes.
A typical temperature cycle test may comprise a temperature increase from room temperature (i.e., about 25 C) to 125 C, a temperature decrease to −40 C, a cold-soak, a temperature increase back up to 125 C, a hot-soak, and a temperature decrease to room temperature again. With each added material or thermal stress, the amount of plastic work density—a measure of material damage within solder ball 150—increases. The higher the plastic work density value, the higher the chance of crack propagation if a defect is present in the solder ball 150. While the standard SMD design addresses delamination concerns by pinning down the edge 172 of the pad 170, a crack may easily propagate across neck 230, possibly along linear path 232.
Referring now to FIG. 3A, a cross-sectional view of a solder joint 300 is shown, in which a solder ball 150 is mounted between a non-solder-mask-defined (NSMD) solder ball pad 270 and a PCB 180. The NSMD pad 270 is so named because the pad is not defined by an opening 310 in the solder mask 132. Instead, the opening 310 may be larger than the pad 270, such that a portion of the insulating material 124 around the pad is exposed, as shown in the perspective view of FIG. 3B. As shown in the cross-section of FIG. 3A, there is no reduced-diameter neck in a solder ball 150 attached to a NSMD pad 270. A crack originating near the interface between the ball 150 and pad 270 may have to travel a non-planar path around the pad edge 272, such as that reflected by nonlinear path 234. While it may be more difficult for the ball 150 to separate from a NSMD pad 270, the solder mask 132 does not extend over the pad 270, pinning it to the insulating layer 124. As such, the potential for delamination at the interface between the insulating material 124 and NSMD pad 270 may be greater than for the standard SMD pad 170 shown in FIGS. 2A and 2B.
An octant model, or one-eighth portion, of a semiconductor package may be used to analyze the plastic work density within a package, as packages may tend to have similar characteristic at points radially disposed from the center. Referring now to FIG. 4, an octant model 500 is shown of the plastic work density within a BGA substrate 502, shown in outline, having SMD pads (not shown). Exemplary plastic work density values 504, indicated by the relative sizes of the bubbles, are shown centered over the locations of their respective solder balls (also not shown). Plastic work density values 504 may be higher over the edge of a die 520 (shown in outline) due to material stresses that may be present in the area. It is therefore desired to devise a solder ball pad for a laminate electronic circuit board with reduced plastic work density values. It is further desired to devise a solder ball pad with the pad-adhesion benefits of a standard SMD pad and the pad geometry and associated crack-propagation protection of an NSMD pad.